Bridging the Gap Between Programming Languages and Hardware Weak Memory Models
We develop a new intermediate weak memory model, IMM, as a way of modularizing the proofs of correctness of compilation from concurrent programming languages with weak memory consistency semantics to mainstream multi-core architectures, such as POWER and ARM. We use IMM to prove the correctness of compilation from the promising semantics of Kang et al. to POWER (thereby correcting and improving their result) and ARMv7, as well as to the recently revised ARMv8 model. Our results are mechanized in Coq, and to the best of our knowledge, these are the first machine-verified compilation correctness results for models that are weaker than x86-TSO.
Thu 17 Jan
|13:45 - 14:07|
Azalea RaadMPI-SWS, Germany, Marko DokoMPI-SWS, Germany, Lovro RožićMPI-SWS, Germany, Ori LahavTel Aviv University, Viktor VafeiadisMPI-SWS, GermanyDOI
|14:07 - 14:29|
Anton PodkopaevHigher School of Economics, JetBrains Research, Ori LahavTel Aviv University, Viktor VafeiadisMPI-SWS, GermanyDOI Pre-print
|14:29 - 14:51|